ok thanks for confirming this.
I note it says in the brochure for the 861 v6/8 there is a 40% improvement in accuracy of the master clock to reduce jitter.
I assume therefore that on the 861v4 the clock is 40% worse jitter.

Wonder if the 40% improvement applies to my HD621?
If so then it would be negated by the less accurate clock in the 861v4.

So i guess the fifo memory buffering is still limited by the accuracy of the master clock?

Hopefully the clock in a future 861 (v9/10?) will be even better still.
I think in the industry they have got down to around 30 pico second clock accuracy.


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