I mean the background is the structure of the
SPDIF (SonyPhilipsDigitalInterface)signal itself.Because the clock and the data are
"combined" and if jitter appears somewhere,
with INCORRECT upsampling its even jitter more.If the SPDIF didnt have "combined" data and clock signals, the data could be better
"extracted" or "decoted" and and wouldnt have
jitter at all.
Maybe the MHR encrypted interface have a different structure?


800v3/218/271/8k.2/5k5s smile /5kC/DSP3200/Reviver/
TT-ELP/Graham Slee Revelation/Trinnov Altitude 32/OPPO 205
__Ayon/HB/Shunyata/Miltzow -- power cables,
__Ayon/Jungson/Miltzow --analog, Miltzow-- digital,
__Vortex/WMA ,